| Vx/IP-Flash VxWorks Device Support
Package for the SBS/Greenspring IP-Flash
copyright (c) 1994,1995 Compware Corp.
FlashLib: Theory of Operation
FlashLib is a flash eprom utility set. It provides
callable services to manage discovery/identification, writing, and erasure of IP-Flash
modules. Read access of the IP-Flash memory for program text, data, or other usage is
performed as though reading RAM.
FlashLib consists of the object file flashLib.o, and an
informational header file, flashLib.h. The object file may be downloaded or included in
the vxWorks kernel make. The package supports IP-Flash modules in any of the 4 IP slots of
the MVME162 processor or the SBS/Greenspring VME IP slave carriers (e.g.,
VIPC610/616/etc).
Each IpFlash module contains a flash control register
(Fcr), which enable interrupts, Vpp(programming voltage) for erase/write, and deep
powerdown modes, for all of the 28F008SA chips on the module. The Fcr is readable, along
with the standard ID prom, in the IP I/O (A16 on the VME carrier) space. The flash chips
are readable in memory space, which is normally either 2 or 8 Mbytes in size. The flash
memory defaults to read mode, and can be read as ordinary read-only D16 memory.
Unprogrammed areas are read back as all one's (0xFFFF).
On the IP-Flash, the flash memory devices are allocated
in pairs, each of which provides the upper and lower bytes of one megaword(2-Mbytes).
Writing appropriate codes to the flash memory range will cause the corresponding flash
chip pair to enter special modes. These modes allow status read, identifier fetch, erase
and write operations. All such modes and all write access to the flash range is managed by
calls to flashLib entry points. The flash chips may be written (programmed) a word at a
time, and are erased a block (64K words, or 128 Kb) at a time.
Strictly speaking, normal read access always exists to
all chip pairs other than those being written or erased by flashLib. However, since
programming voltages will be enabled during this time, it is suggested that all flash
memory access be suppressed while flashLib calls are in progress. The Intel flash chips
include an erase suspension feature, but this is not presently supported in flashLib.
FlashLib also does not use IP-Flash interrupts.
For each IP-Flash module that is registered with
flashRegister, an IP-Flash structure is created. This structure will include the memory
and Fcr base addresses of the module, the memory size in bytes, allocation information
indexed by block number, a mutual exclusion semaphore, and a count/quota structure that
can be used to limit erase access. The flashShow entry point conveniently displays the
contents of this structure.
FlashRegister will test the given memory address to see
that the Intel flash chips are present, and will size the available flash memory space.
Writing and erasing are ordinarily done as a single indivisible operation.
The writeFlash call has a flag bit argument that will
specify that no erasing is to be done. If the range to be written is not already
completely erased, the call will fail in this mode. There is also a verify option.
Writeflash first checks the entire range to be written to see if it is erased; if not, and
the NO_ERASE flag bit is set, an error is returned. In this way, a partial, unsuccessful
write operation is avoided. Next, the range is written, block by block. For each block,
the contents are initially checked for erasure; if not erased, that is done. The contents
are then checked again, if not erased, an error is returned. If the ERASE_ONLY flag bit is
set, we go to the next block. Otherwise, a flash write is done, copying from indicated RAM
to flash. If the WRITE_VERIFY flag bit is set, we read back the locations written and
compare. Write will terminate at the first failure.
Setting the writeFlash flag argument to ERASE_ONLY will
erase blocks in the indicated range as needed. This is exactly how the eraseFlash entry is
implemented. The erase quota/count is available to protect against a runaway program doing
thousands of erases. The quota is set at flashRegister time, and is compared against a
count of block erasures. Exceeding the quota causes the erase/write operation to fail.
Note that a single write/erase operation can involve multiple blocks, each of which
increments the count by one (1).
FlashShow displays the current quota and countn values.
The routines all return status indications, usually the
vxWorks standard OK or ERROR. More detailed error status is saved in a global variable,
flashErrNo, set according to error codes defined in flashLib.h. This variable is cleared
by flashRegister, and is thereafter only modified to indicate a new error. Ordinarily, the
user will clear flashErrNo prior to a flashLib call. FlashShow will display the current
value of flashErrNo, interpreted according to some embedded error print strings, such as
"last flash error". Apart from flashShow, a few messages are written by flashLib
to the standard output. At flashRegister time, a copyright notice is printed. The write
and erase calls indicate which block they are modifying, and announce all transitions of
Vpp as they occur. Errors that terminate write and erase calls are announced.
FlashLib: Entry Points
struct ipFlash *flashRegister( caddr_t ipBase, caddr_t
Fcr, int quota );
flashRegister allocates an ipFlash structure from vxWorks
memory, identifies and sizes the IP-Flash Industry Pack, and returns a pointer to the
IP-Flash structure. On error, it returns NULL. The global variable flashErrNo is cleared,
unless there is an error.
FlashRegister may be called for as many different
IP-Flash modules as exist in the system. The ipFlash pointer must be used in all flashLib
transactions for an IP-Flash module.
IpBase is a pointer to the "memory base"
address for this IP, while Fcr points to the Fcr register, which is located at the
"i/o" base address for this Ip, plus one. On the MVME162, you need to initialize
the IPIC to access an onboard IP slot(see ipaEnable).
Quota is a total erase count supported; if 0, it defaults
to 100.
STATUS writeFlash( struct ipFlash *Fl, caddr_t flashFwa,
caddr_t ramFwa, int size, int flags);
This allows writing to flash memory space, with optional
erase of initially nonempty ranges. A flags bit option also exist for erase only.
WriteFlash is subject to the erase quota set in flashRegister, for any erases needed.
Fl is the ipFlash structure pointer for the IP module,
flashFwa is the direct flash memory first word address, ramFwa is the RAM first word
address of the address space to be copied into the flash (ignored with ERASE_ONLY), size
is in bytes, and flags is set to the appropriate bit options.
The bit options available are NO_ERASE, which precludes
any erase prior to write, ERASE_ONLY which just erases (as needed) the flash range, and
WRITE_VERIFY.
STATUS eraseFlash( struct ipFlash *Fl, caddr_t flashFwa,
int size);
This routine erases the indicated range of flash memory.
Blocks that contain erased contents are not re-erased. eraseFlash is subject to the erase
quota set in flashRegister. Fl is the ipFlash structure pointer for the IP module,
flashFwa is the direct flash memory first word address, and size is in bytes.
STATUS flashShow( struct ipFlash *Fl, int verbose);
This routine prints useful information for an IP-Flash
module. Fl is the ipFlash module structure pointer, and verbose is set non-zero for more
elaborate information. Currently, the additional information printed in verbose mode is
not useful.
STATUS ipaEnable(caddr_t memAdrs);
This routine enables the IP in slot A for memory access
at the indicated memAdrs, required to be on a 64K boundary. The memAdrs should be
appropriately configured via the MVME162 IPIC and 68040 MMU, to disallow vme access and to
be non-caching. Compware provides a modified ysLib.c for the vxWorks MVME162 board support
package that sets up these conditions for memory in the range of 0xee000000 through
0xf0000000.
Notes:
Flashlib does not examine the ID prom on the IP-Flash
module.
Entry point prototypes are omitted from flashLib.h.
An erase quota fault will terminate a write operation
while in progress.
writeFlash functions on a lookahead basis to disallow any
write that will exceed the erase quota before the operation begins.
erase/write is time consuming as it is necessary to
control Vpp by ramping up & down on each erase/write block.
copyright (c) 1994,1995 Compware Corp.
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